Great Ideas in Computer Architecture (Machine Structures)

chipmunk holding square computer chip with cs61c label

CS 61C at UC Berkeley with Justin Yokota - Summer 2025

Lecture: Monday/Tuesday/Wednesday/Thursday 2:00PM - 3:30PM PT, Valley Life Sciences 2050
Recordings will be published to bCourses Media Gallery

Week Date Lecture Discussion Lab HW Project
1 Mon 6/23 Lecture 1: Syllabus, Number Representation
Readings: Course Policies, P&H 2-4, Binary Slides
Lab 0: Intro, Setup Due 6/29
Tue 6/24 Lecture 2: C Basics - Pointers & Arrays Homework 1: Number Representation, C Basics Due 7/02
Wed 6/25 Lecture 3: C - Strings & Memory
Readings: K&R 5-6, 7.8.5, 8.7
Thu 6/26 Lecture 4: C - Generics
Readings: K&R 7.8.5, 8.7
Discussion 1: C, Number Rep


Project 1: snek Due 7/09
Fri 6/27
2 Mon 6/30 Lecture 5: Floating Point
Readings: IEEE 754 Simulator
Discussion 2: C


Lab 1: C Due 7/01
Tue 7/1 Lecture 6: RISC-V I
Readings: P&H 2.1-2.3
Wed 7/2 Lecture 7: RISC-V II
Readings: P&H 2.6-2.7, 2.9-2.10, 3.2
Discussion 3: Floating Point / RISC-V


Lab 2: C Debugging Due 7/03
Thu 7/3 Lecture 8: RISC-V III
Readings: P&H 2.8
Homework 2: C Memory, Floating Point, and RISC-V Due 7/09
Fri 7/4
3 Mon 7/7 Lecture 9: RISC-V IV: Instruction Format
Readings: P&H 2.5, 2.10
Discussion 4: RISC-V Calling Convention


Lab 3: RISC-V, Venus Due 7/10
Tue 7/8 Lecture 10: CALL
Readings: P&H 2.12
Wed 7/9 Lecture 11: Caches I
Readings: P&H 5.1-5.4, 5.8, 5.9, 5.13, Cache Flowchart
Discussion 5: RISC-V ISA, AMAT, CALL


Thu 7/10 Lecture 12: Caches II
Readings: P&H 5.1-5.5, 5.8, 5.9, 5.11, 5.13, Cache Flowchart
Homework 3: RISC-V, Caches Due 7/16 Project 2: CS61Classify A: Due 7/14 B: Due 7/21
Fri 7/11
4 Mon 7/14 Lecture 13: SDS I: Boolean Logic, FSMs
Readings: P&H A.2-A.3, A.10, SDS Handout
Discussion 6: Caches
Tue 7/15 Lecture 14: SDS II
Readings: Blocks Handout
Lab 4: RISC-V Calling Convention Due 7/15
Wed 7/16 Lecture 15: SDS III
Readings: P&H A.3-A.6, 4.8, 4.10, State Handout
Discussion 7: Exam Review
Thu 7/17 Midterm 7-9PM PT Homework 4 Due 7/23
Fri 7/18
5 Mon 7/21 Lecture 16: RISC-V Single Cycle Datapath I
Readings: P&H 4.1, 4.3, 4.4
Discussion 8: SDS, Boolean Algebra
Tue 7/22 Lecture 17: RISC-V Single Cycle Datapath II: Control Logic
Readings: P&H 4.4, 4.5
Lab 5: Logisim Due 7/22 Project 3: CS61CPU A: Due 7/29 B: Due 8/05
Wed 7/23 Lecture 18: RISC-V 5 Stage Pipelining I
Readings: P&H 4.6, 4.7, 4.8
Discussion 9: RISC-V Datapath
Thu 7/24 Lecture 19: RISC-V 5 Stage Pipelining II: Hazards Lab 6: CPU, Pipelining Due 7/24 Homework 5 Due 7/30
Fri 7/25
6 Mon 7/28 Lecture 20: Parallelism I: Data-Level Parallelism Discussion 10: RISC-V Hazards
Tue 7/29 Lecture 21: Parallelism II: Thread-Level Parallelism
Readings: P&H 1.7, 1.8, 2.11, 4.10, 4.11, 5.10, 6.1-6.3, 6.5, 6.7
Wed 7/30 Lecture 22: Parallelism III: Concurrency and MIMD Models
Readings: P&H 1.7, 1.8, 2.11, 4.10, 4.11, 5.10, 6.1-6.3, 6.5, 6.7
Discussion 11: DLP, TLP
Thu 7/31 Lecture 23: Virtual Memory
Readings: P&H 5.7
Lab 7: Parallelism Due 7/31 Homework 6 Due 8/06
Fri 8/1
7 Mon 8/4 Lecture 24: Operating Systems Discussion 12: Virtual Memory
Tue 8/5 Lecture 25: ECC + RAID
Wed 8/6 Lecture 26: TBA Discussion 13: Exam Review
Thu 8/7 Lecture 27: TBA Lab 8: CS61kaChow Due 8/07
Fri 8/8
8 Mon 8/11 No Lecture
Tue 8/12 Final: 11:30AM-2:30PM PT
Wed 8/13 No Lecture
Thu 8/14 No Lecture
Fri 8/15